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CD4033BMS
December 1992
CMOS Decade Counter/Divider
Description
CD4033BMS consists of a 5 stage Johnson decade counter and an output decoder which converts the Johnson code to a 7 segment decoded output for driving one stage in a numerical display. This device is particularly advantageous in display applications where low power dissipation and/or low package count is important. A high RESET signal clears the decade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. The CLOCK INHIBIT signal can be used as a negative-edge clock if the clock line is held high. Antilock gating is provided on the JOHNSON counter, thus assuring proper counting sequence. The CARRY-OUT (Cout) signal completes one cycle every ten CLOCK INPUT cycles and is used to clock the succeeding decade directly in a multi-decade counting chain. The seven decoded outputs (a, b, c, d, e, f, g) illuminate the proper segments in a seven segment display device used for representing the decimal numbers 0 to 9. The 7 segment outputs go high on selection.
Features
* High Voltage Types (20V Rating) * Decoded 7 Segment Display Outputs and Ripple Blanking * Counter and 7 Segment Decoding in One Package * Easily Interfaced with 7 Segment Display Types * Fully Static Counter Operation DC to 6MHz (typ.) at VDD = 10V * Ideal for Low-Power Displays * "Ripple Blanking" and Lamp Test * 100% Tested for Quiescent Current at 20V * Standardized Symmetrical Output Characteristics * 5V, 10V and 15V Parametric Ratings * Schmitt-Triggered Clock Inputs * Meets All Requirements of JEDEC Tentative Standards No. 13B, "Standard Specifications for Description of "B" Series CMOS Device's
Applications
* Decade Counting 7 Segment Decimal Display * Frequency Division 7 Segment Decimal Displays * Clocks, Watches, Timers (e.g. / 60, / 60, /12 Counter/ Display * Counter/Display Driver For Meter Applications
Pinout
CD4033BMS TOP VIEW
Functional Diagram
VDD 16 1 CLOCK 1 CLOCK INHIBIT 2 16 VDD 15 RESET 14 LAMP TEST 13 c 12 b 11 e 10 a 9d 3 RIPPLE BLK IN 8 VSS LAMP TEST RESET 14 CLOCK INHIBIT 15 CLOCK 2 10 a 12 b 13 c 9d 11 e 6 f 7 DECODED OUTPUTS
RIPPLE BLANKING IN 3 RIPPLE BLANKING OUT 4 CARRY OUT 5 f6 g7 VSS 8
7g 5 CARRY OUT 4 RIPPLE BLK OUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
File Number
3301
7-826
CD4033BMS
The CD4033BMS has provisions for automatic blanking of the non-significant zeros in a multi-digit decimal number which results in an easily readable display consistent with normal writing practice. For example, the number 0050.0700 in an eight digit display would be displayed as 50.07. Zero suppression on the integer side is obtained by connecting the RBI terminal of the CD4033BMS associated with the most significant digit in the display to a low-level voltage and connecting the RBO terminal of that stage to the RBI terminal of the CD4033BMS in the next-lower significant position in the display. This procedure is continued for each succeeding CD4033BMS on the interger side of the display. On the fraction side of the display the RBI of the CD4033BMS associated with the least significant bit is connected to a low-level voltage and the RBO of that CD4033BMS is connected to the RBI terminal of the CD4033BMS in the next more-significant-bit position. Again, this procedure is continued for all CD4033BMS's on the fraction side of the display. In a purely fractional number the zero immediately preceding the decimal point can be displayed by connecting the RBI of that stage to a high level voltage (instead of to the RBO of the next more-significant-stage). For example: optional zero 0.7346. Likewise, the zero in a number such as 763.0 can be displayed by connecting the RBI of the CD4033BMS associated with it to a high-level voltage. Ripple blanking of non-significant zeros provides an appreciable savings in display power. The CD4033BMS has a LAMP TEST input which, when connected to a high-level voltage, overrides normal decoder operation and enables a check to be made on possible display malfunctions by putting the seven outputs in the high state. The CD4033BMS are supplied in these 16 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4W H2R H6W
Logic Diagram
*LAMP TEST
14 COUT (CLOCK 5 DQ CL CL Q R DQ CL CL Q R DQ CL CL Q R
/ 10)
15*
DQ CL CL Q R
DQ CL CL Q R
10 a
RESET
12 b
13 c 9 d 1 CL 6 f 11 e
*CLOCK *CLOCK
INHIBIT 2
7 g 3 4 16 VDD 8 GND VDD a f e VSS d g b c SEGMENT DESIGNATIONS RBO
*RBI
*ALL INPUTS PROTECTED
BY CMOS INPUT PROTECTION NETWORK
FIGURE 1. CD4033BMS
7-827
Specifications CD4033BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case for 10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . . ja jc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 LIMITS TEMPERATURE +25
oC
PARAMETER Supply Current
SYMBOL IDD
CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND
MIN -100 -1000 -100 -
MAX 10 1000 10 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8
UNITS A A A nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V
+125oC -55oC +25o C
+125oC -55oC +25oC +125oC -55oC +25oC, +125oC, -55oC
+25oC, +125oC, -55oC 14.95 +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 3.5 11 0.53 1.4 3.5 -2.8 0.7
VOH > VOL < VDD/2 VDD/2
1.5 4 -
V V V V
NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.
7-828
Specifications CD4033BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 TPHL4 TPLH4 TTHL TTLH FCL VDD = 5V, VIN = VDD or GND 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 +25oC +125oC, -55oC LIMITS MIN 2.5 1.85 MAX 500 675 700 945 550 743 600 810 200 270 UNITS ns ns ns ns ns ns ns ns ns ns MHz MHz
PARAMETER Propagation Delay Clock To Carry Out Propagation Delay Clock To Decode Out Propagation Delay Reset To Carry Out Propagation Delay Reset To Decode Out Transition Time
SYMBOL TPHL1 TPLH1 TPHL2 TPLH2 TPLH3
CONDITIONS (NOTE 1, 2) VDD = 5V, VIN = VDD or GND
+25oC +125oC, -55oC
+25oC +125oC, -55oC
+25oC +125oC, -55oC
+25oC +125oC, -55oC
Maximum Clock Input Frequency NOTES:
+25oC +125oC, -55oC
1. VDD = 5V, CL = 50pF, RL = 200K 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE -55oC, +25oC +125oC VDD = 10V, VIN = VDD or GND 1, 2 -55 C, +25 C +125oC VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC
oC o o
MIN 4.95 9.95 0.36 0.64 0.9 1.6 2.4 4.2 -
MAX 5 150 10 300 10 600 50 50 -0.36 -0.64 -1.15 -2.0 -0.9 -2.6
UNITS A A A A A A mV mV V V mA mA mA mA mA mA mA mA mA mA mA mA
+125 Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOL VOH VOH IOL5 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, VOUT = 0.4V 1, 2 1, 2 1, 2 1, 2 1, 2
+25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC +125oC -55oC +125oC -55oC +125oC -55oC +125oC -55oC +125oC -55oC
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1, 2
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1, 2
Output Current (Source)
IOH5A
VDD = 5V, VOUT = 4.6V
1, 2
Output Current (Source)
IOH5B
VDD = 5V, VOUT = 2.5V
1, 2
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1, 2
7-829
Specifications CD4033BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Output Current (Source) SYMBOL IOH15 CONDITIONS VDD =15V, VOUT = 13.5V NOTES 1, 2 TEMPERATURE +125oC -55 C Input Voltage Low Input Voltage High Propagation Delay Clock To Carry Out Propagation Delay Clock To Decode Out Propagation Delay Reset To Carry Out Propagation Delay Reset To Decode Out Transition Time VIL VIH TPHL1 TPLH1 TPHL2 TPLH2 TPLH3 VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V TPHL4 TPLH4 TTHL TTLH FCL VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V TW VDD = 5V VDD = 10V VDD = 15V Minimum Reset Removal Time TREM VDD = 5V VDD = 10V VDD = 15V Minimum Clock Pulse Width TW VDD = 5V VDD = 10V VDD = 15V Input Capacitance NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH VTN VTP VTP F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10A VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VSS = 0V, IDD = 10A VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC MIN -2.8 0.2 VOH > VDD/2 MAX 25 -0.2 1 2.8 1 VOL < VDD/2 UNITS A V V V V V CIN Any Input 1, 2 1, 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25oC +25 C +25 C +25oC +25oC +25oC +25oC +25 C +25oC +25oC +25
oC o o o o
MIN +7 5.5 8 -
MAX -2.4 -4.2 3 200 150 250 180 240 160 250 180 100 50 120 100 50 30 15 10 220 100 80 7
UNITS mA mA V V ns ns ns ns ns ns ns ns ns ns MHz MHz ns ns ns ns ns ns ns ns ns pF
Maximum Clock Input Frequency Minimum Reset Pulse Width
+25oC +25 C +25
oC o
+25oC +25
oC
+25oC +25oC +25oC +25oC +25oC
7-830
Specifications CD4033BMS
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Propagation Delay Time SYMBOL TPHL TPLH CONDITIONS VDD = 5V NOTES 1, 2, 3, 4 TEMPERATURE +25oC MIN MAX 1.35 x +25oC Limit UNITS ns
NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25oC limit. 4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current - MSI-2 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A 1.0A 20% x Pre-Test Reading 20% x Pre-Test Reading DELTA LIMIT
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 IDD, IOL5, IOH5A READ AND RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A IDD, IOL5, IOH5A
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9( POST-IRRAD Table 4
CONFORMANCE GROUPS Group E Subgroup 2
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION PART NUMBER Static Burn-In 1 (Note 1) Static Burn-In 2 (Note 1) Dynamic BurnIn (Note 1) Irradiation (Note 2) 4 - 7, 9 - 14 1, 2, 14, 15 4 - 7, 9 - 14 1 - 3, 8, 15 3 - 6, 8, 10 - 13 2, 8, 15 8 16 7, 9, 16 3, 16 1 - 3, 15, 16 4 - 7, 9 - 13 1 OPEN GROUND VDD 9V -0.5V 50kHz 25kHz
PART NUMBER CD4033BMS
7-831
Specifications CD4033BMS
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 Note 1 Static Burn-In 2 Note 1 Dynamic BurnIn Note 1 Irradiation Note 2 NOTE: 1. Each pin except VDD and GND will have a series resistor of 10K 5%, VDD = 18V 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V 0.5V OPEN 4 - 7, 9 - 13 4 - 7, 9 - 13 4 - 7, 9 - 13 GROUND 1 - 3, 8, 14, 15 8 2, 3, 8, 14, 15 8 VDD 16 1 - 3, 14 - 16 16 1 - 3, 14 - 16 4 - 7, 9 - 13 1 9V -0.5V 50kHz 25kHz
Timing Diagram
CLOCK RESET CLOCK INHIBIT LAMP TEST COUT (CLOCK / 10) RBI D n CL CL p D Q R CL p CL p n CL CL p n CL CL Q Q
a b c d e f g RBO 01 234 5 6 78 9 01 8 456 7 8 9 12
CL Q R CL
CL
n CL
FIGURE 2. CD4033BMS TIMING DIAGRAM
FIGURE 3. DETAIL OF TYPICAL FLIP-FLOP STAGE
7-832
CD4033BMS Typical Performance Characteristics
OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC
30 25 20 15 10 5
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 7.5 5.0 2.5 10V
10V
5V 0 5 10 15
5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 4. TYPICAL N-CHANNEL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V
FIGURE 5. MINIMUM N-CHANNEL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5
0
0 -5 -10 -15
0
0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) 100
-10V
-20 -25
-10V
-10
-15V
-30
-15V
-15
FIGURE 6. TYPICAL P-CHANNEL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
PROPAGATION DELAY TIME (tPLH, tPHL) (s)
FIGURE 7. MINIMUM P-CHANNEL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
PROPAGATION DELAY TIME (tPLH, tPHL) (s) AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC
600
300 SUPPLY VOLTAGE (VDD) = 5V
400
SUPPLY VOLTAGE (VDD) = 5V
200
10V 100 15V
200
10V 15V 0 20 40 60 80 100
0
20
40
60
80
LOAD CAPACITANCE (CL) (pF)
LOAD CAPACITANCE (CL) (pF)
FIGURE 8. TYPICAL PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE FOR DECODED OUTPUTS
FIGURE 9. TYPICAL PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE FOR CARRY-OUT OUTPUTS
7-833
CD4033BMS Typical Performance Characteristics (Continued)
MAXIMUM CLOCK INPUT - FREQUENCY (fCL) (MHz) 20 POWER DISSIPATION (PD) (W) AMBIENT TEMPERATURE (TA) = +25 C tr = tf = 20ns 15
o
105
8 6 4 2
AMBIENT TEMPERATURE (TA) = +25oC
104
SUPPLY VOLTAGE (VDD) = 5V
8 6 4 2
10V 10V 15V
10
103
8 6 4 2
5
102
8 6 4 2
10 0 2 4 6 8 10 12 14 16 1 SUPPLY VOLTAGE (VDD) (V)
(CL) = 15pF LOAD CAPACITANCE (CL) = 50pF
2 4 68 2 4 68
10
102
2
4 68
103
2
4 68
104
2
4 68
105
INPUT PULSE FREQUENCY (fCL) (MHz)
FIGURE 10. TYPICAL MAXIMUM CLOCK INPUT FREQUENCY AS A FUNCTION OF SUPPLY VOLTAGE
FIGURE 11. TYPICAL POWER DISSIPATION AS A FUNCTION OF CLOCK INPUT FREQUENCY
Light Emitting Diode Displays
MONSANTO MAN 3 OR EQUIVALENT (LOW POWER) VDD 1/7 CA3082 OR EQUIVALENT VDD
VDD IB 1/7 CA3082 OR EQUIVALENT MAN 3 R A IF
MONSANTO MAN 1 OR EQUIVALENT VDD
MAN 1 R A A IB R IF A
A CLOCK INHIBIT RESET G VSS G R VDD 3.5V IF 5mA/SEGMENT 100% DUTY CYCLE VP - VBE - VF(LED) R= ILED CD4033BMS 7 SEGMENTS IB A
CLOCK INHIBIT RESET
CD4033BMS 7 SEGMENTS
R G VSS IB G R
G
G VDD 5V (MIN) IB 0.4mA IF 12mA/Seg.(100% DUTY CYCLE) bdc(MIN) 30 VCE(SAT) 0.5V R= VDD - VCE(sat)-VF(LED) ILED WHERE VF = FORWARD DROP ACROSS DIODE
WHERE VP = INPUT PULSE VF = FORWARD DROP ACROSS DIODE
FIGURE 12. INTERFACING THE CD4033BMS WITH COMMERCIALLY AVAILABLE LIGHT EMITTING DIODE DISPLAYS
7-834
CD4033BMS 7-Segment Display Devices
1/7 SEGMENTS IB VDD VT
IT
INCANDESCENT READOUTS Numitron DR2000 Series TUBE REQUIREMENTS VT = 3.5 - 5V IT = 24mA Segment ASSUMED TRANSISTOR CHARACTERISTICS
VT
CD4049UB at VCC = 10V (min) Vo "0" 2V IT = 8mA (min) VT 3.5V to 6V CD4049UB at VCC = 10V (min) Vo "0" 0.6V IT = 8mA (min) at VCC = 6V (min) Vo "0" 1V IT = 5mA (min) VT 1.5V to 3.5V
CLOCK INHIBIT RESET
CD4033BMS 7 SEGMENTS 1/7 CA3081 OR EQUIVALENT
VCC VSS 1 OF 7 SEGMENTS
dc (min) 25 VCE (sat) 0.5V VDD = 8V (min) IB = 1mA (min) IT = 24mA (min)
1/6 CA4049UB
IT
LOW-POWER INCANDESCENT READOUTS PINLITES INC-Series O and R TUBE REQUIREMENTS 0-03-15 0-04-30 0-06-30 R-R3-20 R-R4-30 VT(V) 1.5 3 3 2 3 mA/Segment 8 8 8 4.3 4.3
ASSUMED TRANSISTOR CHARACTERISTICS dc (min) 30 VCE (sat) 0.5V VCC 3.5V (min) IB 0.25mA (min) IT 7.5mA (min)
*The interfacing buffers shown, while a necessity with the CD4033A, are not required when using the "B" devices; the "B" outputs ( 10 times the "A" outputs) can drive most display devices directly especially at voltages above 10V.
VT 170V DC VDD 1 OF 7 SEGMENTS CD4033BMS VDD
CLOCK INHIBIT RESET
CD4033BMS 7 SEGMENTS CLOCK 13.5V LOGIC VOLTAGE INHIBIT RESET
7 SEGMENTS d
VSS f VSS 4.5V g
e
c b a
NEON READOUT (NIXIE TUBE**) 1. Alco Electronics - MG19 2. Burroughs - B5971, B7971, B8971 TUBE REQUIREMENTS Alco MG19 Burroughs B5971 Burroughs B7971, B8971 VT(Vdc) 180 170 170 mA/Segment 0.5 3 6
WITH VON = 18V MEDIUM BRIGHTNESS IN LOW AMBIENT LIGHT BACKGROUND WILL RESULT. THE POINT OF NO NOTICEABLE GLOW IS VOFF 4.5V
1.6V AC OR DC
LOW VOLTAGE VACUUM FLORESCENT READOUTS 1. Tung-Sol DIGIVAC S/G Type DT1704A or DT1705C 2. Nippon Electric (NEC): Type DG12E or LD915 TUBE REQUIREMENTS: 100 to 300 A/segment at tube voltages of 12V to 25V depending on required brightness Filament requirement 45mA at 1.6V, ac or dc.
**(Trademark) Burroughs Corp. TRANSISTOR CHARACTERISTICS Leakage with transistor cutoff - 0.05mA V(BR)CER dc (min) 30 >VT
(Trademark) Wagner Electric Co. FIGURE 13. INTERFACING THE CD4033BMS WITH COMMERCIALLY AVAILABLE 7-SEGMENT DISPLAY DEVICES*
7-835
CD4033BMS Chip Dimensions and Pad Layouts
Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch)
METALLIZATION: PASSIVATION: BOND PADS:
Thickness: 11kA - 14kA,
AL.
10.4kA - 15.6kA, Silane 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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